SAN JOSE, Calif., Nov. 02, 2016 (GLOBE NEWSWIRE) -- POET Technologies Inc. (the "Company" or "POET") (OTCQX:POETF); (TSX Venture:PTK), a developer of opto-electronics fabrication processes for the semiconductor industry, today published the following letter to shareholders from the Company's Chief Executive Officer, Dr. Suresh Venkatesan. November 2, 2016 To Our Shareholders, Following today's close of our public offering, which generated aggregate gross proceeds of C$12,528,000, I would like to address the concerns expressed by several of our shareholders and expand further on the Company's rationale for raising additional capital at this time. Let me emphasize that the decision to raise capital was made following careful evaluation and consideration by POET's executive management team and the Board. Our increased manufacturing capability in Singapore fundamentally changes the Company's capital investment priorities. We therefore collectively determined that the offering was essential in order to make critical investments in multiple areas of the business. First, it is important for the Company to gain greater control over its own destiny as we continue to advance technology and product development related to POET's integrated optical platform technology, including both the VCSEL and detector. As previously communicated, we have completed transfer from the lab and are beginning to develop and optimize our integrated optical platform technology in a high-volume large wafer scale manufacturing foundry. As we continue product development of the POET platform technology, we anticipate bringing key capabilities in-house for the most time-sensitive aspects of technology development to help avoid future delays associated with third-party vendors. These delays relate to the timing and scheduling of POET's manufacturing requirements in the production plans of the vendors. As a small company with limited prototype runs, we do not represent a large current account to these vendors and lead times can sometimes extend to months. We believe that investments in the development of multiple sources for our epitaxial wafers and in capital equipment will allow us to accelerate the cycles of learning that are needed to produce prototype devices that meet distinct specifications.