ALISO VIEJO, Calif., Sept. 26, 2013 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced the availability of its low-cost IGLOO ®2 FPGA Evaluation Kit, providing customers with a PCI ® Express (PCIe) compliant form factor evaluation platform. This full feature kit enables designers to quickly evaluate the integration, low power, security, instant-on and high reliability features of Microsemi's recently announced IGLOO2 FPGAs. (Logo: http://photos.prnewswire.com/prnh/20110909/MM66070LOGO) The IGLOO2 FPGA Evaluation Kit includes a PCIe control plane demonstration design that streamlines and accelerates the development of transceiver I/O-based FPGA designs to build PCIe and Gigabit Ethernet based systems. As the kit is PCI Express form factor compliant, it allows for design, evaluation and development using a standard laptop with an ExpressCard slot or a desktop with a PCIe slot. Designers can also explore the high performance memory system (HPMS) capabilities of IGLOO2 FPGAs. "This low-cost platform enables evaluation and prototyping of our newest FPGA family and offers full access to common electrical interfaces including PCIe, which are requirements for many mainstream applications," said Paul Ekas, vice president of Marketing for SoC products at Microsemi. "The kit also includes methods to perform power measurements on our industry-leading low power IGLOO2 FPGA. This is an important feature when designing products where low power is a critical factor." The IGLOO2 FPGA Evaluation Kit features the 12K logic element M2GL010T-1FGG484 device and includes an RJ45 interface to 10/100/1000 Ethernet, Full-Duplex SERDES SMAs, 512MB of LPDDR, 64MB SPI Flash, USB-UART connections as well as I2C, SPI and GPIO headers. The kit includes a 12 volt (V) power supply but can also be powered via the PCIe edge connector and a FlashPro4 JTAG programmer for programming and debugging. The kit allows for development and testing of PCIe Gen2 x1 lane designs, as well as testing of the FPGA transceiver's signal quality using full-duplex SERDES SMA pairs. Test points are conveniently pulled out to allow easy power measurements using a standard digital multi-meter.