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MOUNTAIN VIEW, Calif., Nov.
Synopsys Fusion Technology and Artificial Intelligence Solution Recognized with Product of the Year Awards
Accelerates InP-based PIC Design and Production
Innovative RTL-to-GDSII Product Redefines IC Design through Fusion of Synthesis and Place-and-Route
Design Compiler NXT Boosts Runtime by 2X, QoR by 5 Percent, and Provides Support Down to 5nm and Beyond
MOUNTAIN VIEW, Calif. , Nov 5, 2018 /PRNewswire/ -- Synopsys, Inc.
DesignWare STAR Memory System Maximizes Manufacturing Yield with New Algorithms to Mitigate Defects in Embedded MRAM-based Designs
SpyGlass DFT ADV Guides Design Changes for Improved ISO 26262 Metrics
Accelerates Achieving Test Goals While Meeting Power, Performance, and Area Targets
New DesignWare Memory Interface IP Targets AI, Automotive, and Mobile SoCs
3X Faster Analog Simulation and New Fusion Technologies Accelerate AMS Design
New Fusion Technologies Reduce Time to Analog Design Closure
Latest Release Accelerates Verification of Large, Advanced-node Post-layout Analog Designs
Expertise and Market-Leading Position in Emulation Being Brought to Bear, in Partnership with Lockheed Martin and Analog Devices
Synopsys' Design, Verification, Software Integrity, and IP Solutions Enable Power, Performance, Area, and Security Required for Server and Networking Products Based on Arm Neoverse IP
ASIP Designer Enables Rapid Architectural Exploration to Optimize Custom Processors for Power, Performance, and Area
Enables Architecture Exploration for Advanced AI SoCs to Meet Optimal Performance and Power Goals Targeted for Cloud and Edge Applications
MOUNTAIN VIEW, Calif., Oct.
Synopsys Recognized for Collaboration on Interface IP, Joint Development of 5-nm Design Infrastructure, Joint Development of VDE Cloud Solution, and Joint Delivery of WoW Design Solution
TSMC and Synopsys Collaboration Delivers Design Flow for TSMC's WoW and CoWoS Packaging Technologies
TSMC and Synopsys Collaboration Streamlines Cloud-based IC Design
Successful Customer Tapeouts of DesignWare IP in N7+ Marks Significant Milestone of the Collaboration
Latest Iteration of the Building Security In Maturity Model Reflects Software Security Initiatives of 120 Firms Over the Past Decade
Certification Delivers Proven Production-ready Flow for Advanced Customer Designs
DesignWare IP in FinFET Processes Adopted by More Than a Dozen Companies Designing ADAS and Autonomous Driving SoCs
MOUNTAIN VIEW, Calif., Sept.
Development of SMART Photonics PDK for Synopsys' PIC Design Suite Enables a Complete and Seamless InP-Based Design Flow
Synopsys Fusion Technology Enables Superior Power, Performance, Area for AI Chip Design
Silicon-Proven DesignWare IP Enables Ultra-High-Definition 8K Video and High-Fidelity Audio in Multimedia SoCs
Enabling AI Chip Design from the Data Center to the Edge
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