Synopsys Announces Support Of TensorFlow Lite For Microcontrollers On Energy-Efficient ARC EM And ARC HS Processor IP - TheStreet

Synopsys Announces Support Of TensorFlow Lite For Microcontrollers On Energy-Efficient ARC EM And ARC HS Processor IP

MOUNTAIN VIEW, Calif., May 27, 2020 /PRNewswire/ -- Highlights: The TensorFlow Lite for Microcontrollers port to the Synopsys DSP-enhanced DesignWare ARC EM and HS processors enables a wide range of machine learning applications on resource-constrained...
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MOUNTAIN VIEW, Calif., May 27, 2020 /PRNewswire/ --

Highlights:

  • The TensorFlow Lite for Microcontrollers port to the Synopsys DSP-enhanced DesignWare ARC EM and HS processors enables a wide range of machine learning applications on resource-constrained edge devices
  • New memory-efficient framework with optimized embARC Machine Learning Inference library boosts neural network software performance by more than 5X

Synopsys, Inc. (Nasdaq: SNPS) today announced support for TensorFlow for Microcontrollers software from Google, optimized for the Synopsys DSP-enhanced DesignWare® ARC® Processor IP. TensorFlow Lite for Microcontrollers is designed to run on memory-constrained designs with only kilobytes of memory and executing machine learning models for applications, such as wake-word detection, gesture classification, and image classification. The combination of TensorFlow Lite for Microcontrollers with ARC Processor IP enables developers of AI and low-power IoT devices to efficiently deploy machine learning inferencing at the edge, mitigating the latency effects of network connectivity.

"Our WiseEye WE-I Plus ASIC platform, which targets battery-powered smart devices with AI-enabled intelligent sensing, requires extremely power-efficient processor solutions," said Jordan Wu, president and chief executive officer at Himax Technologies. "By supporting popular machine learning frameworks, such as TensorFlow Lite for Microcontrollers in their DSP-enhanced ARC processors, Synopsys helps ease and accelerate the development of a wide range of applications in voice, image, and signal processing."

"TensorFlow Lite for Microcontrollers enables developers to quickly generate machine learning models for easy deployment of neural networks on low-power devices," said Pete Warden, technical lead at Google. "The optimized implementation of the software on Synopsys' ARC processors allows users to efficiently develop voice, gesture classification, and other machine learning-based applications on resource-constrained devices."

The port of TensorFlow Lite for Microcontrollers to ARC Processors uses the embARC Machine Learning Inference (MLI) software library, which supports all DSP-enhanced ARC EM and HS processors. This currently includes the ultra-low-power ARC EM5D, EM7D, EM9D, and EM11D processors and high-performance ARC HS45D and HS47D processors.  The MLI software library provides an optimized set of essential kernels for efficient inference of small or mid-sized machine learning models, resulting in a performance improvement of more than a 5x improvement compared to the performance of the TensorFlow Lite for Microcontrollers reference kernels. embARC MLI is distributed as free and open source software through the embARC.org website.

"Power efficiency and performance are key requirements for implementing machine learning functionality in edge devices," said John Koeter, senior vice president of marketing for IP and strategy at Synopsys. "Optimizing the port of TensorFlow Lite for Microcontrollers software for the Synopsys DSP-enhanced ARC EM and ARC HS processors enables developers to speed deployment of on-device machine learning inferencing for their ARC Processor-based AI and IoT embedded SoC designs."

Availability and Resources

  • TensorFlow Lite for Microcontrollers optimized for DesignWare DSP-enhanced ARC EM Processors is available now from the TensorFlow Lite for Microcontrollers repository on github.
  • TensorFlow Lite for Microcontrollers optimized for DesignWare DSP-enhanced ARC HS Processors will be available Q3 CY2020.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contact:

Kelly JamesSynopsys, Inc. 650-584-8972 kellyj@synopsys.com

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SOURCE Synopsys, Inc.