By Robert N. Castellano, Ph.D, president of The Information Network.

Despite some problems on the horizon, rises in the book-to-bill ratio by North American and Japanese semiconductor equipment manufacturers is giving hope that the downturn has bottomed out.

Semiconductor Equipment and Materials International reported this week that North America-based manufacturers of semiconductor equipment posted $323.4 million in orders in June, on a three-month average basis, and a book-to-bill ratio of 0.77. The three-month average in June grew about 12% from $287.8 million in May, and was 69% lower than a year earlier.

Japan-based manufacturers of semiconductor equipment registered billings in May of 39.2 billion yen ($409.7 million). The billings figure is down 3.2% from April 2009 and down 68.7% from May 2008.

However, capital equipment expenditures as a percentage of semiconductor revenue have been dropping precipitously, as shown in the chart going back to 1995. In January 1995, 11.4% of revenue generated by semiconductor manufacturers was spent on new processing equipment. Forward to May 2009 and only 3.8% of semiconductor revenue was spent on equipment.

For all of 1995, 13.8% of semiconductor revenue was spent on equipment purchases. For 2007, a healthy year for the equipment market, 11.7% of semiconductor revenue was spent on equipment. For 2009, we forecast that semiconductor revenue will drop 26%, while we see semiconductor equipment revenue dropping 46%. The chart below clearly illustrates this difference. Capital equipment purchases from January through May 2009 were only 4.9% of semiconductor revenue.

Semiconductor equipment manufacturers, in an effort to gain one-upmanship in the market, have been increasing throughputs of their product. Fifteen years ago, 60 wafers per hour was the norm. Now, tools are on the market with a throughput twice that amount, meaning that only half the number of tools are needed to process the same number of wafers.

The semiconductor industry started replacing the manufacture of chips to 300mm from 200mm wafers in 1997. Because of the larger diameter, 2.25 times more chips can be made on a 300mm wafer than on a 200mm wafer. In 1997, about 8,000 300mm wafers were utilized, representing a small fraction of the 141 million wafers with diameters ranging from 100mm to 200mm. In 2008, nearly 32 million 300mm wafers were processed, representing 21% of the 149 million wafers processed. Here again, half the number of tools are needed to process the same number of chips.

Technology advances have mitigated the reduction. In 1995, state-of-the-art integrated circuits were manufactured with dimensions of 350nm (0.35 microns). Currently, state-of-the-art chips are manufactured with dimensions as small as 45nm. But equipment to make these chips doesn't come cheap.

Lithography equipment, for example, from companies such as


(ASML) - Get Report



(CAJ) - Get Report

, and


cost about $4 million to manufacture a chip with 350mm dimensions but $40 million to manufacture a chip with 45nm dimensions. That's why a semiconductor manufacturing plant, or fab, that cost $1 billion in 1995 now costs $4 billion.

The semiconductor equipment industry also is suffering from competition from some really large vendors. The top 10 equipment suppliers registered $24.5 billion in sales in 2008, compared with $30.7 billion for the whole market. That left just $6.2 billion in revenue to be shared by the next 50 equipment companies.

So, while things look better for the equipment industry through the remainder of 2009, the long-term prognosis doesn't bode well for the industry in general and particularly for the small players.

Robert N. Castellano, Ph.D, is President of THE INFORMATION NETWORK, a leading consulting and market research firm for the semiconductor, LCD, HDD, and solar industries. Dr. Castellano is internationally recognized as one of the leading experts in these areas. He has nearly 25 years of expertise as an industry analyst. Dr. Castellano has provided insight on emerging technologies to many business and technical publications, including Business 2.0, BusinessWeek, The Economist, Forbes, Investor's Business Daily, Los Angeles Times Magazine, the New York Times, USA Today and the Wall Street Journal. He is a frequent speaker at conferences and corporate events. He has over ten years experience in the field of wafer fabrication at AT&T Bell Laboratories and Stanford University before founding The Information Network in 1985. He has been editor of the peer-reviewed Journal of Active and Passive Electronic Devices since 1985. He is author of the book "Technology Trends in VLSI Manufacturing" published by Gordon and Breach. His book "Solar Cell Processing" was published in 2009 by Old City Publishing. He received his Ph.D. in Solid State Chemistry from Oxford University (UK).