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As AMD (AMD) gets set to launch a new family of server CPUs that should offer plenty of bang for the buck, Intel (INTC)  is leaning on its massive engineering resources and more aggressive pricing to help strengthen its hand.

At an event held on Tuesday at its Santa Clara, CA headquarters, Intel officially launched a next-gen product family for its dominant Xeon server CPU franchise. The products, codenamed Cascade Lake, were first unveiled at a November event and arrive 21 months after Intel launched a Xeon family codenamed Skylake-SP.

What Intel's Latest Server CPUs Deliver

Cascade Lake relies on the same CPU core architecture as Skylake-SP, offers similar memory cache sizes and (through the process has been improved a bit) relies on the same 14-nanometer (14nm) manufacturing process node. As a result, it isn't expected to deliver major increases in raw performance. And while Cascade Lake officially supports up to twice as many cores per CPU socket (56 vs. 28), Intel only pulled this off by packing two chips into one very power-hungry and expensive chip package.

However, Intel has improved the memory capabilities of many Cascade Lake CPUs relative to comparable Skylake-SP CPUs, and has also revamped its pricing to deliver better price/performance. And perhaps just as importantly, the company has used its giant R&D budget to deliver an array of products and features for Cascade Lake that are collectively meant to keep its fight with AMD and other rivals from revolving solely around pricing and raw performance.

Whereas AMD launched 14 CPUs for its first-gen Epyc server CPU family in 2017 (codenamed Naples), Intel's Cascade Lake lineup features over 50 off-the-shelf CPUs, including ones optimized for cloud data centers and networking hardware. Intel, which has a long history of working with cloud giants on custom CPUs, also says it will have "dozens" of custom Cascade Lake parts available (AMD, to be fair, does custom work as well).

Cascade Lake also supports the ability to use Intel's 3D XPoint next-gen memory as a main memory source. 3D XPoint, which was co-developed with Micron (MU) , is sold by Intel under the Optane brand and creates a middle ground between DRAM (very fast, but expensive, not dense and unable to retain data when power is lost) and flash memory (cheap, dense and able to retain data, but much slower). As a result, it's arguably ideal for in-memory databases and other workloads that require large amounts of relatively fast memory.

In addition, Intel has baked in a set of technologies (collectively referred to as DL Boost) that yield better performance for AI inference (the running of trained AI/deep learning models against real-world data and content). While a growing amount of inference work is being handled by accelerators such as GPUs and FPGAs, tech analyst Patrick Moorhead thinks DL Boost is a good fit for inference workloads requiring low latency, such as recommendation engines on websites and apps.

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There's also AVX-512 (also supported by Skylake-SP chips), a proprietary instruction set that improves CPU performance for a number of demanding workloads, and (on certain Cascade Lake chips) Speed Select, a technology that lets users guarantee that a CPU's most powerful cores are available to a particular application.

Intel vs. AMD

In mid-2019, AMD plans to launch second-gen Epyc server CPUs that are codenamed Rome. The chips will rely on a 7nm Taiwan Semiconductor (TSM)  manufacturing process that delivers major performance and power efficiency gains relative to the 14nm process used by AMD's first-gen Epyc CPUs, as well as a revamped CPU core architecture known as Zen 2.

In November, AMD CEO Lisa Su asserted Rome would deliver a massive 2x increase in performance per CPU socket relative to Naples, while also delivering twice as much memory bandwidth and supporting up to 64 CPU cores (Naples tops out at 32). Su might officially announce Rome during a keynote address she's giving on May 27 at the Computex trade show.

In light of AMD's performance claims, and given that (thanks to manufacturing process delays) Intel doesn't expect to launch server CPUs relying on a 10nm manufacturing process that's seen as competitive with TSMC's 7nm process until 2020, it's not hard to see how Rome could help AMD gain meaningful share. That's particularly the case among cloud giants that care a lot about raw performance and power efficiency. AMD estimates it had a mid-single digit server CPU share at the end of 2018, and has said it's aiming to achieve a double-digit share within four to six quarters.

With its official Cascade Lake pricing, Intel is already showing some willingness to price more aggressively to help counter AMD, and it could eventually do more. During Intel's January earnings call, CEO Bob Swan admitted -- in what was widely seen as a reference to AMD's planned PC and server CPU launches -- that Intel expects competition to intensify as 2019 progresses, and that its full-year guidance "incorporates the fact that we're going to fight to protect our position."

Meanwhile, the full list of CPUs and features that Intel is launching for Cascade Lake is fresh evidence that the company is trying to shift the server CPU debate from being merely about specs for individual chips to what an entire platform can deliver, as well as about how well a company can develop chips that are optimized for various customers and workloads.

These efforts probably won't stop AMD from taking share via Rome, given the price/performance and power improvements it's likely to deliver. But they could limit the damage some, particularly among traditional enterprises that have historically been quite loyal to Intel.

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