IBM Chips Get 3D Tech

The move aims to produce electronic devices that are smaller, more powerful and use less battery power.
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IBM

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is taking chips into the third dimension.

The technology giant said Thursday that later this year it will begin producing semiconductors that use a 3D technology to stack multiple chips atop one another.

The technique could bring about electronic devices that are smaller, more powerful and consume less battery power.

Instead of using metal wires to interconnect the various chips at the heart of today's electronic devices, 3D technology allows chips to communicate through tiny holes drilled directly into the silicon.

These so-called "through-silicon-vias" mean that multiple chips can be stacked together like a sandwich, reducing the distance that information needs to travel on the chip by 1,000 times, according to IBM.

The company likens it to the difference between parking 10 feet away from an airport in a multifloor garage and parking in one of many lots spread two miles away from the terminal.

Numerous companies have been experimenting with 3D chip-stacking, and some have released limited versions of chips based on the technology.

In February,

Intel

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showed off a research prototype of a microprocessor

featuring 80 individual cores, with each core directly connected to a memory component stacked underneath the processor chip.

But the company has not provided details on when -- or if -- it plans to offer chips with stacked memory on the commercial market.

While IBM has been working on the technology for nearly 10 years in the lab, the company says it has figured out a way to build chips with 3D features in its existing chip-fabrication facilities.

"The breakthrough is that we've been doing this in the manufacturing line," said Lisa Su, vice president of semiconductor research and development at IBM. That opens up the potential to manufacture various kinds of chips using 3D technology in large volumes.

IBM's 3D chip-stacking technology will make its debut in power amplifier chips used in cell-phone and wireless networking products. IBM said it will sample the chips in the second half of the year with production slated for 2008.

In the case of power amplifiers, eliminating the excess wiring means the chip will pick up less stray noise and signals, resulting in better battery life.

But applying 3D technology to other types of chips could lead to big gains in performance without increasing the chip's footprint.

Su said that IBM was interested in applying 3D technology to more complex chips in the future, such as microprocessors, which she predicted was still three to five years out.

"It really is a technology that can be used across a wide set of applications," said Su. "So it's a single innovation that has a lot of different avenues to explore."

Shares of IBM closed Wednesday's regular session off $1.30 to $95.16.