SANTA CLARA, Calif.
June 3, 2014
- Galaxy Design Platform enablement for Intel's second-generation Tri-Gate technology delivers optimized 14-nanometer (nm) results
- DesignWare Memory Compilers tuned for 14-nm offer high performance and low power profile
- Silicon-proven 22-nm Tri-Gate tool and IP enablement extended to Intel's 14-nm process
Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, and Intel Corporation (Nasdaq: INTC), a world leader in computing innovation, today announced broad SoC design enablement for Intel's 14-nm Tri-Gate process technology for
use by customers of Intel Custom Foundry. The Intel Custom Foundry 14-nm design platform supports Synopsys' industry-leading Galaxy™ Design Platform tools and RTL-to-GDSII methodology, high-performance DesignWare
Memory Compiler intellectual property (IP), and advanced interface IP. Extending the companies' production-proven design enablement for Intel's 22-nm foundry process design platform, the design tools and IP are now ready for Intel's 14-nm foundry process technology.
Intel's Tri-Gate technology is a proprietary 3D transistor technology with the gate surrounding the channel on all three sides of the transistor. It provides designers with dramatic performance, power and area benefits for their products vs. previous generations of transistors. Intel's collaboration with Synopsys on 14-nm and 22-nm on the Intel Custom Foundry design platform allows designers to take advantage of Intel's Tri-Gate technologies for cloud infrastructure and mobile applications.
The comprehensive suite of Galaxy Design Platform tools enabling the Intel Custom Foundry design platform include: Design Compiler® and IC Compiler
synthesis, place and route, PrimeTime
static timing, IC Validator physical verification, HSPICE
circuit simulation, StarRC
extraction and Galaxy Custom Designer
layout. The Galaxy Design Platform provides a holistic solution in tightly integrated tool chains, enabling a seamless flow. Intel and Synopsys collaborated closely in developing this enablement to ensure that the tools meet the challenging Tri-Gate requirements and model the complexities involved. This includes HSPICE supporting new device and statistical modeling; enhanced StarRC extraction modeling; and support for complex new routing rules, along with enhanced variation-aware post-route optimization, in IC Compiler for these advanced nodes.
Synopsys and Intel have worked together at 22-nm to deliver silicon-proven advanced IP, including DesignWare Memory Compilers and DDR3/2 PHYs, optimized for Intel's unique Tri-Gate process. These were the industry's first commercially available IP on Tri-Gate process technology. The most recent collaboration expands to Intel Custom Foundry's 14-nm Tri-Gate technology by providing tuned DesignWare Memory Compilers that offer very high performance while still keeping a low power profile.