Microchip Technology Inc. (NASDAQ: MCHP), a leading provider of microcontroller, mixed-signal, analog and Flash-IP solutions, today introduced a new 4Kb I
C™ Serial Presence Detect (SPD) EEPROM device—the
. This device is specifically designed to work with the next generation of Double Data Rate 4 (DDR4) SDRAM modules used in high-speed PCs and laptops, while also supporting older DDR2/3 platforms.
This new device is designed for the price-competitive consumer products market and is capable of operation across a broad voltage range (1.7V to 3.6V). This device is JEDEC JC42.4 (EE1004-v) Serial Presence Detect (SPD) compliant and is designed to be compatible with DDR4 SDRAM modules. The 34AA04 includes reversible software write protection for each of four independent 128 x 8-bit blocks and supports a new SMBus compatible bus time out. The device features a page write capability of up to 16 bytes of data and 3 address pins allow up to eight devices on the same bus.
The 34AA04 is backward compatible with existing DDR2 and DDR3 SPD EEPROMs. To ensure backward compatibility, the memory array of the 34AA04 is divided into two separate 256-byte banks to overlay with the architecture of older SPD EEPROM devices. The 34AA04 serves a wide range of applications in the consumer-electronic market (e.g., PCs, laptops, graphic cards), among others.
“Microchip has supported the DRAM market with SPD EEPROMs in prior DDR1, DDR2 and DDR3 platforms and is pleased to announce our new JEDEC-Compliant SPD EEPROM devices for the DDR4 DIMM modules,” said Randy Drwinga, vice president of Microchip’s Memory Products Division. “The reversible software write-protect on four individual blocks, faster data rates and SMBus compatibility offers DRAM manufacturers added flexibility to enable new features in the high-speed PC, laptop and graphic card markets.”
Pricing & Availability
The 34AA04 devices are available today for sampling and volume production, in 8-pin SOIC, TDFN, UDFN, TSSOP and PDIP packages, starting at $0.20 each, in 10,000 unit quantities.