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Peregrine’s UltraCMOS® power limiter replaces discrete GaAs PIN diode circuits with a turnkey, monolithic solution that offers better performance in a smaller form factor.

Stocks in this article: PSMI

Product descriptions in "Availability" section of release dated April 7, 2014, should read: 50 W power limiter (instead of 5 W power limiter).

The corrected release reads:

PEREGRINE INTRODUCES ULTRACMOS® RF POWER LIMITERS, THE INDUSTRY’S FIRST MONOLITHIC ALTERNATIVE TO DISCRETE, PIN-DIODE LIMITERS

Peregrine’s New Architecture Delivers Turnkey, Power-Limiter Solutions That Outperform GaAs-Based Limiters in Protecting Systems From Excessive RF Power, Intentional Jammers and ESD Events

EDI CON – In Booth #512 Peregrine Semiconductor Corp. (NASDAQ: PSMI), founder of RF SOI (silicon on insulator) and pioneer of advanced RF solutions, debuts its new line of UltraCMOS® RF power limiters, including PE45140 and PE45450 slated for release in May. Peregrine’s power limiters represent the industry’s first turnkey, monolithic solutions to provide an alternative to discrete, PIN-diode limiters based on gallium arsenide (GaAs). UltraCMOS power limiters deliver simple, repeatable and reliable protection ideal for test-and-measurement, land-mobile-radio (LMR), wireless-infrastructure, military and radar systems.

“Peregrine makes best-in-class RF products, and we are pleased to extend that heritage into the new category of power limiters announced at EDI CON today,” says Duncan Pilgrim, director of marketing at Peregrine. “Our customers continuously find that incumbent GaAs-based RF solutions do not rise to the challenge of new complexity in the market, and they are investing in Peregrine’s SOI technology as fast as we can develop new options like this.”

Turnkey Monolithic Architecture Delivers Unprecedented Benefits

On a chip eight times smaller than the board space required by discrete, PIN-diode solutions, Peregrine’s new power limiters provide a 10-100X improvement in response and recovery time; deliver greater than 40 dB improvement in linearity (IP3); and offer a 20X improvement in ESD (electrostatic discharge) protection.

Of particular interest to RF designers, Peregrine’s power limiters save PCB space with a small form factor; reduce BoM (bill of materials) by eliminating the need for extra components; and improve time to market by reducing in-design time and costs. They also beat existing solutions in RF performance, including higher linearity to eliminate signal distortion, high ESD to ensure high reliability, wide bandwidth to enable design flexibility and fast response and recovery times to ensure robust protection of power-sensitive components. Finally, because Peregrine’s power limiters are based on UltraCMOS instead of GaAs, they can be closely integrated with other UltraCMOS RF components.

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