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DesignCon Recognizes Altera For Outstanding FPGA And SoC Innovations

SAN JOSE, Calif., Feb. 4, 2014 /PRNewswire/ -- Altera Corporation (NASDAQ: ALTR) today announced it received two DesignVision Awards at DesignCon 2014 for its innovations in FPGA and SoC technology. Altera's next-generation, 14 nm Stratix 10 FPGAs and SoCs won for best semiconductor and IP, and the ARM® Development Studio 5 (DS-5™) Altera Edition toolkit won for best design verification tool. Altera was presented with the two DesignVision Awards at a ceremony held at the Santa Clara Convention Center during DesignCon 2014.

(Logo: http://photos.prnewswire.com/prnh/20101012/SF78952LOGO)

Started in 2005, the DesignVision Award recognizes technologies, applications, products and services judged to be the most unique and beneficial to the industry. DesignVision Award candidates are judged based on innovation, uniqueness, market impact, customer benefits and value to society.

Janine Love, technical director, DesignCon, UBM Tech, commented, "We had quite a challenging time choosing these winners among all of the innovative products we judged. Ultimately, our 2014 winners represent the best of the best in each of their respective industries."

Altera's next-generation high-performance Stratix® 10 FPGAs and SoCs were recognized by the judges for offering breakthrough advantages in performance, power savings and system integration. Based on Intel's 14 nm 3D Tri-Gate transistor technology, Stratix 10 FPGAs and SoCs are designed to enable the highest performance, most power-efficient applications in the communications, military, broadcast and compute and storage markets. Stratix 10 FPGAs and SoCs feature a new high-performance architecture that will deliver up to 2X the core performance of current high-end FPGAs. For power-sensitive application, Stratix 10 devices deliver up to 70 percent lower power compared with current high-end FPGAs. Stratix 10 SoCs integrate a 64-bit quad-core ARM Cortex™-A53 processor to offer the industry's most versatile heterogeneous computing platform.

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