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Altera Accelerates Performance Of Suricata Network Security Monitoring Engine With Stratix V FPGAs And OpenCL

SAN JOSE, Calif., Nov. 15 2013 /PRNewswire/ --  Altera Corporation (NASDAQ: ALTR) today announced the first successful demonstration of the Suricata Engine, an open-source Network Intrusion Detection and Prevention (IDS/IPS) system. The demonstration shows an accelerated Suricata Engine on a Stratix® V FPGA developed with the Altera SDK for OpenCL™. By leveraging the high-performance capabilities of Stratix V FPGAs and the computing acceleration of OpenCL, this demonstration is ideal for government applications requiring fast traffic and monitoring performance. Altera will be showing this demonstration at MILCOM 2013, November 18-20, in San Diego, Calif., in booth #615.  


Designers of government applications, specifically internet security systems, are challenged with implementing an object-oriented approach to threat detection and modeling while still retaining the ability to quickly update threat models. By leveraging the hardware and software acceleration on a Stratix V FPGA, and the Altera SDK for OpenCL for direct programming, customers can implement threat modeling and detection engines like Suricata to achieve high data rates and low-latency operations for the system.

Altera is partnering with the Open Information Security Foundation (OISF) to deliver industry-leading open source IDS/IPS FPGA-based solutions, including Suricata. OISF is a non-profit foundation made up of software developers and security professionals committed to engaging the open-source security community in order to identify current and future IDS/IPS solutions.

"Designers of government and security systems are looking for open-source solutions that enable them to prevent, detect and respond to threats in the rapidly changing cyber security market," said Ian Land, senior manager, Military, Aerospace and Government product line at Altera. "Altera worked with the OISF to make the Suricata Engine available for use on Altera FPGAs to deliver a power-efficient platform to protect government and commercial systems from cyber attacks."

"The OISF is pleased to have Altera as a gold-level consortium member," said Matt Jonkman, President of the OISF. "The OpenCL version of the Suricata engine on Altera FPGAs, is a valuable tool to the open-source security community."

Stratix V FPGAs are an ideal demonstration for the Suricata engine since they are the highest performance FPGAs in the industry with a two speed-grade advantage over the nearest competitor. This performance enables Suricata system designers to leverage the full bandwidth of an FPGA. When combined with the Altera SDK for OpenCL, open-source customers can bring secure solutions to market faster.

The Altera SDK for OpenCL is the industry's only FPGA-optimized solution to conform with the OpenCL specification as defined by the Khronos Group. The Altera SDK for OpenCL provides a software-friendly programming environment to design high-performance FPGA-based systems.

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