- Altera Qsys system integration tool saves significant time and effort throughout the FPGA design cycle by automatically connecting together intellectual property (IP) functions and subsystems. Using Qsys, designers can seamlessly integrate a mix of industry-standard interfaces, including Avalon, ARM® AMBA AXI, APB and AHB interfaces, for faster system development. In Quartus II software v13.1, Qsys further improves productivity with enhanced system visualization, allowing multiple simultaneous views of the Qsys system. This makes modifying the system, either by adding or connecting components to new a peripheral, much easier.
- Altera SDK for OpenCL is now in full production and is the industry's only FPGA OpenCL solution to pass conformance testing by adhering to the OpenCL specification defined by the Khronos Group. It provides a software-friendly programming environment to design high-performance systems that use FPGAs on Altera's Preferred Board Partner Program boards or Altera SoCs when using the Altera Cyclone® V SoC development board.
- Altera DSP Builder Design Tool enables system developers to effectively implement high-performance, fixed- and floating-point algorithms into their digital signal processing (DSP) designs. To give engineers more options and flexibility during the design phase, Altera DSP Builder Advanced Blockset systems can now be integrated within MathWorks HDL Coder. Improvements in fast Fourier transform (FFT) processing include variable-sizing of FFTs at run-time and super-sampling FFTs for extremely high data rates of 10GHz, giving unprecedented performance and flexibility options to those implementing this common DSP function.
Altera Quartus II Software V13.1 Delivers Up To 70 Percent Reduction In Compile Times
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