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Industry's First SPI NOR Device With Replay-Protected Monotonic Counter Feature Meets Security Requirements of Ultrathin Applications and is Validated for Future Intel ® Ultrabook™ Platforms
BOISE, Idaho, Sept. 10, 2013 (GLOBE NEWSWIRE) -- Micron Technology, Inc., (Nasdaq:MU) today announced the availability of a replay-protected monotonic counter (RPMC) feature for their SPI NOR Flash memory devices, which are validated for future Intel Ultrabook platforms.
The cost-effective 64Mb density is the sweet-spot solution currently available for immediate platform-enablement activities.
The RPMC feature in Micron's SPI NOR device is the first in a family of cryptographic primitives that will significantly enhance preboot security in cost-sensitive embedded, mobile, and personal computing architectures. The RPMC-enabled device facilitates critical nonvolatile data storage, while making systems resistant to rollback and replay attacks. It enables original equipment manufacturers (OEMs) to further strengthen code/data storage in the boot memory and deliver more secure systems to customers.
Micron's 64Mb RPMC-enabled SPI NOR device supports nonvolatile storage and authentication needs that are critical to the chipset security implementation for future Intel Ultrabook platforms and is compliant with
Intel's Serial Flash Hardening Product External Architecture Specification. The device, which is available in SO8W and W-DFN 0.8mm packages, also includes improved erase performance to increase throughput and lower the initial cost of manufacturing programming.
"This first-to-market RPMC feature, developed by Micron for our SPI NOR device, is an additional demonstration of our commitment to continuously meet application requirements and customer needs," said
Jeff Bader, vice president of Micron's Embedded Solutions Marketing. "Our NOR Flash excellence, coupled with the leadership and expertise of Intel, make this device the best-in-class solution for the Intel Ultrabook and other future Intel-based platforms."
"I appreciate Micron's expertise in the SPI Flash device technology space and their support of the replay-protected monotonic counter feature for the Intel platform prototype validation," said Nitin Sarangdhar, Sr. Principal Engineer at Intel.