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Cypress’s PSoC® 4 Architecture Named Editor’s Choice Product By Embedded Computing Design Magazine

Cypress Semiconductor Corp. (NASDAQ: CY) today announced that the editors of Embedded Computing Design magazine have named Cypress’s new PSoC® 4 programmable system-on-chip architecture an Editor’s Choice Product for the May issue. The architecture combines Cypress’s best-in-class PSoC analog and digital fabric and industry-leading CapSense ® capacitive touch technology with ARM ®’s power-efficient Cortex™-M0 core. The truly scalable, cost-efficient architecture delivers PSoC’s trademark flexibility, analog performance and integration, along with access to dozens of free PSoC Components™—“virtual chips” represented by icons in Cypress’s PSoC Creator™ integrated design environment. The new PSoC 4 device class will challenge proprietary 8-bit and 16-bit microcontrollers (MCUs), along with other 32-bit devices.

Cypress recently announced the first two product families from its PSoC 4 architecture: the PSoC 4100 and PSoC 4200 families. The PSoC 4100 family, the lowest-cost ARM ®-based PSoC, brings PSoC flexibility and integration to cost-sensitive, high-volume applications. The PSoC 4200 family features faster processor and ADC sampling speeds and PLD-based enhanced universal digital blocks (UDBs). In addition to capacitive sensing applications, PSoC 4 targets field-oriented control (FOC) motor control, temperature sensing, security access, portable medical, and many others. For more information, visit www.cypress.com/go/psoc4.

"We selected the PSoC 4 architecture as an Editor’s Choice Product for its combination of flexible analog and digital resources with capacitive touch technology and the 32-bit ARM Cortex-M0 core,” said Warren Webb, Editorial Director at Embedded Computing Design.

“We are very pleased to earn this recognition from the esteemed editors of Embedded Computing Design,” said Bruce Weyer, Senior Vice President of Corporate Marketing at Cypress. “With PSoC’s trademark flexibility, best-in-class analog integration, low power and low cost, our new PSoC 4 families can address a huge range of applications for the embedded design community.”

The PSoC 4 architecture offers best-in-class power leakage of 150 nA while retaining SRAM memory, programmable logic, and the ability to wake up from an interrupt. In stop mode, it consumes only 20 nA while maintaining wake-up capability. It has the widest operating voltage range of any Cortex-M0-based device, enabling full analog and digital operation from 1.71V to 5.5V. The architecture facilitates integrated, high-performance custom signal chains and provides both configurable analog and flexible routing.

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