MOUNTAIN VIEW, Calif.
May 13, 2013
- Achronix standardizes on Synopsys' IC Complier for design, and IC Validator for verification
- Synopsys tools used in production for first commercial FinFET-based design
- Latest tool enhancements enable support for all emerging FinFET requirements
Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced that Achronix Semiconductor has successfully used both Synopsys' IC Compiler
physical design and IC Validator physical verification solutions to sign off its Speedster22i
FPGA – the industry's first system-on-chip (SoC) design using FinFET transistors. Enabled by FinFET technology, Achronix's Speedster22i promises significant power, performance and cost benefits relative to competitive offerings. Synopsys' IC Compiler physical implementation tool has been enhanced to support correct-by-construction implementation of all FinFET-specific design rules, while the IC Validator physical verification tool used foundry rule decks to enable fast, accurate verification of FinFET-based SoCs and extraction of new FinFET device parameters. IC Compiler and IC Validator are now the standard solutions for place-and-route, design-rule-checking (DRC), and layout-vs.-schematic (LVS) checking in Achronix's design flow.
"Our experience with a 22-nanometer test chip impressed us with Synopsys' ability to handle the complex technology requirements demanded by our FinFET-based process," said Rahul Nimaiyar, vice president of hardware engineering at Achronix. "The quality of layout results as well as the excellent multi-CPU scalability of DRC and the high productivity of LVS debug make Synopsys the best physical implementation solution on the market for FinFET designs."
Synopsys' FinFET-ready Design Tools
Conventional approaches to continually shrink the conductive channel length of flat or planar transistors are facing serious limitations. In order to achieve acceptable switching performance, shorter conductive channel lengths tend to place additional burden on power and voltage. FinFET technology features non-planar (3D) transistor channels that wrap around a raised silicon "fin." FinFETs can be driven by a lower supply voltage and can switch transistors off completely, thereby reducing leakage and dynamic power consumption. Additionally, FinFETs can be switched on and off more rapidly, which increases maximum IC performance.