Mentor Graphics Corporation (NASDAQ: MENT) today announced their participation with STMicroelectronics and LETI in a technical session and luncheon during the DATE conference in Grenoble, France on March 19, 2013.
Who: Mentor Graphics, STMicroelectronics and LETI
What: Technical session to address semiconductor alternative processes for advanced CMOS
When: Tuesday, 19 March, 2013, 13:00 - 14:00 (Lunch provided to attendees)Where: Auditorium Dauphine, ALPEXPO, Grenoble, France Grenoble ecosystem to provide semiconductor alternative process for advanced CMOS The session presents the Ultra-Thin Body and Box (UTBB) Fully Depleted SOI (FDSOI) process and shows that it meets requirements for high-performance at low-power and high-energy efficiency. The 28nm FDSOI, 14nm FDSOI, and 10nm FDSOI nodes offer a practical and cost-effective roadmap to shrink features and enable a significant boost for "green" products. With unmatched access resistance and electrostatic characteristics, planar SOI is superior to other technologies based on bulk CMOS technology or FinFET architecture. Product silicon demonstrates outstanding performances for low-power applications in consumer electronics, including tablets and mobile phones. The session will address manufacturing capabilities, design infrastructure and future R&D roadmaps. Presentations will be given by the following companies and spokespeople:
- “FDSOI: from successful collaborative R&D to successful Silicon results,” by Philippe Magarshack, executive vice-president, STMicroelectronics
- “Design infrastructure to support advanced FDSOI below 20nm,” by Jean-Marc Talbot, director of Mentor Graphics R&D center in Grenoble, France
- “Roadmap towards 10nm FDSOI node,” by Laurent Malier, CEO, LETI