"Yield Explorer easily accommodates the wide variety of yield analysis requirements across our business units and is fully customizable to suit their range of data types, analysis and reporting preferences," said Andrea Burri, Supply Chain Solutions director at STMicroelectronics' Company Central Planning. "In addition to being deployed for volume diagnostics, Yield Explorer will be used by product engineers across ST to perform traditional yield analyses based on functional, parametric and embedded memory tests."
"Systematic yield loss due to design-process interactions requires complex analyses incorporating many different types of design data," said Howard Ko, senior vice president and general manager of the Silicon Engineering Group at Synopsys. "ST is a pioneer in recognizing volume diagnostics as the most effective method to bring design data into yield analysis. ST and Synopsys have collaborated in refining the Yield Explorer usage and TetraMAX ATPG diagnostics during all phases of new product yield ramp so that design and product engineers may easily use it across a wide range of products."
Synopsys, Inc. (Nasdaq:SNPS) accelerates innovation in the global electronics market. As a leader in electronic design automation (EDA) and semiconductor IP, its software, IP and services help engineers address their design, verification, system and manufacturing challenges. Since 1986, engineers around the world have been using Synopsys technology to design and create billions of chips and systems. Learn more at www.synopsys.com.Editorial Contacts: Tess Cahayag Synopsys, Inc. 650-584-5446 email@example.com Lisa Gillette-Martin MCA, Inc. 650-968-8900 ext. 115 firstname.lastname@example.org SOURCE Synopsys, Inc.
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