Nanometrics Incorporated (NASDAQ:NANO), a leading provider of advanced process control metrology and inspection systems, today announced that its SPARK-API macro defect inspection system has been qualified by a leading device manufacturer in Asia for advanced 2X nm devices. The system is being used in the development of advanced 3D wafer-scale packaging (WSP) processes for next-generation memory and logic devices, which are currently scheduled for high-volume production later this year.
The SPARK-API was qualified at multiple inspection steps, including bonding quality, wafer thinning and backside processing for through-silicon via (TSV) applications. “The SPARK was selected for its versatility to address the wide range of process control inspection needs in this emerging segment of WSP,” commented Lars Markwort, vice president of the Inspection Business Unit at Nanometrics. “The SPARK platform ideally meets the high-volume manufacturing needs of 3D-WSP with its high throughput and low cost of ownership enabled by capturing a full wafer image in a single ‘shot.’ The SPARK’s unique technology detects both large-area and small particle defects, as well as residue from previous process steps and voids in the bond layer from improper bonding.”
“We are pleased to have our SPARK-API system selected by one of our leading customers, along with the opportunity to work with an industry leader on this rapidly emerging new technology,” commented Tim Stultz, president and chief executive officer of Nanometrics. “This latest selection further advances our strategy to expand our served markets by entering the inspection market as well as to increase our participation in growth segments such as 3D device integration. The SPARK system highly complements the position we have established with our UniFire ® system for TSV, micro-bump and advanced metallization process control, providing a comprehensive, end-to-end solution for our customers and their emerging applications in 3D-WSP.”
The SPARK can be deployed for macro defect inspection across semiconductor manufacturing lines, providing cost-effective and extendible technology for mask, wafer backside, lithography, and wafer-scale packaging. When used alongside, or combined on the Lynx™ platform with other Nanometrics solutions for critical dimension, overlay and topography, manufacturers can achieve the lowest cost of ownership, highest information throughput and smallest fab footprint for advanced process control metrology and inspection.
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