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Teradyne's Magnum Delivers Breakthrough Performance And Cost Of Test Economies Based On Its Innovative "Compound PTE Architecture"

Stocks in this article: TER

The Magnum test system from Teradyne (NYSE:TER), with its patented, scalable chassis design and unique tester-per-board architecture enables the industry’s highest Compound Parallel Test Efficiency resulting in the highest throughput and lowest cost of test for consumer digital devices including microcontrollers, touch screen controllers, standard logic, FPGAs and embedded memory. The optional Magnum Precision Analog Channel (MPAC) extends the system’s performance to test the most demanding embedded peripherals including ADCs and DACs commonly included in consumer digital SOCs such as touch screen microcontrollers.

The MPAC instrument includes analog source, analog capture and precision voltage reference resources and can be ordered with any Magnum system order or upgraded to over 1000 Magnum’s installed worldwide. For increased test system configuration flexibility, the MPAC can be ordered with up to 48 channels of source/capture/Vref or with 24 channels of source/capture/Vref plus 32 device power supply channels. Multiple MPAC instruments can be configured in a single system to enable massive multisite test.

Teradyne will showcase the Magnum test system with high density precision analog instrumentation for consumer digital device test in Booth #2169 at SEMICON China in Shanghai on March 20-22. The demonstration will highlight superior multisite scalability and comprehensive test for one of the world’s most versatile 32-bit microcontroller from Atmel’s AT32 U3 family, which has been deployed worldwide for applications ranging from high-performance communication to low-power mobile touch to industrial control/automotive applications. Key demonstrated Magnum test capabilities include:

• High accuracy measurements and throughput for common DC tests such as contact, IDD and leakage

• Flash memory with algorithmic pattern generation feature

• Functional tests with various logic vector pattern depths

• 12-bit ADC testing including INL, DNL, gain and offset

• 12-bit DAC testing including INL and DNL

"The Magnum’s high density instrumentation, innovative scalable architecture, programming environment and complete signal delivery solutions enables breakthrough performance and cost of test economies not achievable on any alternative test solution," said Jason Zee, general manager, Consumer Business Unit, Teradyne. "As an example, the Magnum SV can test more than 128 microcontroller devices in parallel, and with its Compound PTE architecture, delivers the highest production test throughput available in the marketplace."

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